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STE6302 Embedded Systems - 5 ECTS
The main goal of this course is to give a general introduction to embedded system design which can be implemented using FPGA. In this course, students will learn to program the processors embedded in electronic devices. In the lab FPGA boards will be used as target platforms. At the end of this course, students will be able to use electronic design automation tools and will have implemented a set of complete embedded systems on the FPGA boards.
- Introduction to the Course and Embedded Systems
- VHDL Introduction
- Review of Hardware background
- Synthesis from VHDL and Coding VHDL for Synthesis
- VHDL design examples
- Design of Controllers. Finite State Machines and Algorithmic State Machine (ASM) Charts
- FPGA Devices
- Spartan-3 FPGA Family
- FPGA Design Flow
- FPGA based Embedded systems
- Example designs of embedded systems using FPGA
- FPGA-based Embedded systems for satellite systems.
This course is oriented hardware and interfaces. It presents in details the different parts of an embedded system based on FPGA and/or micro-controllers. The embedded systems contains both hardware and software components and therefore a hardware/software co-design will be also mentioned. The course will give a basic knowledge on specification methods, design representations as well as related design methods. Special emphasis will be put on interface synthesis and low-power design methods.
- Review and evaluate hardware and software platforms for Embedded Systems.
- Demonstrate an understanding of microprocessor design.
- Demonstrate an understanding of FPGA implementation using VHDL.
- Program simple applications in VHDL and run these in FPGAs.
- Understanding how to build embedded systems for various applications, especially for satellite applications.
Homeworks (3 units) and Labs (about 7-8 units). Students must attend at least 70% Lab works (at least 5 Lab works) at the laboratory UiT in Narvik. The reports of Homeworks and Labworks must be submitted before notified deadlines.
Evaluation 3 h written exam and home- and lab portfolio assesment. Grading will be done by using A-F grading scale, where F is a fail. A re-sit exam will be arranged for this course
Date for examinationWritten examination 17.12.2019
Homework and Labs hand in date 21.12.2019
The date for the exam can be changed. The final date will be announced in the StudentWeb early in May and early in November.